This invention relates to integrated circuitry, and more specifically to an integrated circuit for use in a sample and hold network.
Sample and hold circuits have been found to be very useful in processing a number of different signals through a single item of equipment. Rather than transmitting each signal in its entirety, it is possible to acquire discrete time-spaced samples of the various signals, process the samples instead of the original signals, and then reconstitute the samples back into their original form when the processing is complete. Very high degrees of accuracy can be achieved if samples are taken at a sufficient frequency. For example, numerous telephone conversations can be transmitted over a single telephone line by the process of multiplexing, i.e., acquiring samples of each conversation sequentially, converting the signals to digital code, transmitting the coded signals in series over the line, and then demultiplexing by segregating and decoding the signal for each separate conversation at the other end of the line so that the various conversations may be reconstructed through filter network in their original form. By a proper synchronization of the multiplexing equipment at the transmitting end with the demultiplexing equipment at the receiving end, the transmission line can be efficiently utilized to transmit all of the conversations over the same time span.
Since there is a minimum sampling rate (known as the Nyquist rate) necessary to attain a given level of transmission accuracy for each conversation, the number of conversations that can be handled depends to a considerable degree on the number of different conversation samples that can be sandwiched in between successive samples of the first conversation. This in turn depends upon the brevity of each sample or, in other words, the amount of time necessary to acquire each sample. In addition, rapid signal acquisition enhances synchronization between the sampling and signal reconstituting functions. The capacity and efficiency of a telephonic transmission system is accordingly directly related to the speed at which samples can be acquired.
A capacitor is commonly used to hold each sample for data conversion until the next sample is to be acquired. During the new sample acquiring period the capacitor is charged to adjust its voltage level to that of the new sample. (The term "charging" as used herein includes both positive and negative charging, unless otherwise indicated by the text.) A simple way of accomplishing this involves connecting the input signal to the capacitor through a switch. The switch is operated by a series of control pulses so as to close the connection between the input signal and capacitor during sample acquisition periods, and open the connection during hold periods. While this technique is capable of producing the correct sample levels, the time required to charge the capacitor for each sample is dependent upon the current available from the input signal, which frequently is current limited and unduly increases the total time spent in the sampling mode. In order to alleviate this problem a current amplifier may be introduced between the input signal and the capacitor to increase the charging rate and thereby reduce the time required for each sample. However, beyond a certain degree of current amplification this becomes relatively expensive for integrated circuitry. Higher gains can also result in an overshooting of the desired capacitor charge that necessitates a delay to allow the capacitor to recover the correct voltage level. Another problem associated with integrated circuitry involves the junction reverse bias currents of the large geometry power transistors. These currents cause an undesirable droop of the capacitor signal during hold mode.